Shenzhen Huihe Circuits Co.,Ltd.
[email protected] +86-755-33583558 Ext 603
How to design PCB stack structure in PCB layout?

How to design PCB stack structure in PCB layout?

PCB stack
There are two main rules to be followed in laminated design
 
1. Each trace layer must have an adjacent reference layer (power source or stratum);
 
2. Keep the minimum distance between adjacent main power layer and stratum to provide larger coupling capacitance.

The following is an example of stacking from two layers of PCB to eight layers of PCB

A、 Lamination of single side PCB and double sided PCB
 
For double-sided PCB, because of the small number of layers, there is no stacking problem. The control of EMI radiation is mainly considered from wiring and layout;

The EMC problem of single-layer PCB and double-layer PCB is more and more prominent. The main reason for this phenomenon is that the signal loop area is too large, which not only produces strong electromagnetic radiation, but also makes the circuit sensitive to external interference. The simplest way to improve the EMC of transmission lines is to reduce the loop area of key signals.

Key signal: from the perspective of electromagnetic compatibility, the key signal mainly refers to the signal that produces strong radiation and the signal that is sensitive to the outside world. Signals that can produce strong radiation are generally periodic signals, such as low-order signals of clock or address. The signal sensitive to interference refers to the analog signal with low level.

Single and double-layer plates are usually used in low-frequency simulation design below 10kHz
 
1) The power lines in the same layer are arranged radially, and the total length of the lines is minimized;
 
2) The power supply and ground wire shall be close to each other; a ground wire shall be placed beside the key signal line, which shall be as close as possible to the signal line. In this way, a smaller loop area is formed and the sensitivity of differential mode radiation to external interference is reduced. When a ground wire is added to the side of the signal line, a circuit with the smallest area is formed. The signal current will definitely take this circuit instead of other ground paths.
 
3) If it is a double-layer circuit board, a ground wire can be laid along the signal line on the other side of the circuit board, close to the signal line, and the line should be as wide as possible. The resulting loop area is equal to the thickness of the circuit board multiplied by the length of the signal line.

B、 Stacking of four layer PCB

1)SIG-GND(PWR)-PWR (GND)-SIG;
 
2)GND-SIG(PWR)-SIG(PWR)-GND;
 
For the above two kinds of laminated design, the potential problem is the traditional 1.6 mm (62 mil) plate thickness. The layer spacing will become very large, which is not conducive to the control of impedance, interlayer coupling and shielding; especially, the large spacing between power layers reduces the plate capacitance and is not conducive to noise filtering.
 
For the first scheme, it is usually used when there are more chips on board. This scheme can get better Si performance, but it is not very good for EMI performance. It is mainly controlled by routing and other details. Main attention: the formation is placed in the connecting layer of the signal layer with the most intensive signal, which is conducive to absorbing and suppressing radiation; the area of the plate is increased to reflect the 20h rule.
 
For the second scheme, it is usually used in the case that the chip density on the board is low enough and there is enough area around the chip (to place the required power supply copper clad layer). In this scheme, the outer layer of PCB is all stratum, and the middle two layers are signal / power layer. The power supply on the signal layer is routed with wide lines, which can make the path impedance of the power supply current low, and the impedance of the signal microstrip path is also low. From the perspective of EMI control, this is the best 4-layer PCB structure available.
 
Main points: the distance between the signal and power mixed layers in the middle should be widened, and the wiring direction should be vertical to avoid crosstalk; the area of control board should be appropriate to reflect the 20h rule; if the wiring impedance is to be controlled, the above scheme should be very careful to arrange the wiring under the power supply and grounding copper island. In addition, the power supply or copper laying on the ground should be interconnected as much as possible to ensure the connectivity between DC and low frequency.

C. Stacking of six layer PCB

For the design with high chip density and high clock frequency, the design of 6-layer PCB should be considered
 
1)SIG-GND-SIG-PWR-GND-SIG;

For this scheme, the stacking scheme can get better signal integrity. The signal layer is adjacent to the ground layer, the power layer and the ground layer are matched. The impedance of each trace layer can be well controlled, and both strata can absorb magnetic lines well. And in the case of power supply and formation integrity, it can provide a better return path for each signal layer.

2)GND-SIG-GND-PWR-SIG -GND;
 
For this scheme, this scheme is only applicable to the case where the device density is not very high. This stack has all the advantages of the upper stack, and the ground plane of the top and bottom layers is relatively complete, which can be used as a better shielding layer. It should be noted that the power layer should be close to the non main component surface, because the plane of the bottom layer will be more complete. Therefore, EMI performance is better than the first scheme.
 
Summary: for the scheme of six layer PCB, the space between power layer and layer should be reduced as far as possible to obtain good power and ground coupling. However, it is not easy to control the space between the main power supply and the formation even though the PCB thickness of 62mil is reduced. Compared with the first scheme and the second scheme, the cost of the second scheme will be greatly increased. Therefore, we usually choose the first scheme when stacking. The design follows 20h rule and mirror layer rule.

D. Stacking of 8-layer PCB

a. Due to the poor electromagnetic absorption capacity and large power impedance, this is not a good stacking method. Its structure is as follows:

1. Signal 1 element surface, microstrip line layer
 
2. Signal 2 internal microstrip routing layer, better routing layer (x direction)
 
3.Ground
 
4. Signal 3 stripline routing layer, better routing layer (Y direction)
 
5. Signal 4 stripline routing layer
 
6.Power
 
7. Signal 5 internal microstrip layer
 
8. Signal 6 microstrip layer

b.Because of the addition of reference layer, it has better EMI performance, and the characteristic impedance of each signal layer can be well controlled
 
1. Signal 1 element surface, microstrip line layer, good routing layer
 
2. Ground formation, good electromagnetic wave absorption capacity
 
3. Signal 2 stripline routing layer, good routing layer
 
4. Power supply layer, and the formation below constitute excellent electromagnetic absorption
 
5. Ground formation
 
6. Signal 3 stripline routing layer, good routing layer
 
7. Power stratum with large power impedance
 
8. Signal 4 microstrip line layer, good routing layer

c. Due to the use of multi-layer ground reference plane, it has very good geomagnetic absorption capacity.
 
1. Signal 1 element surface, microstrip line layer, good routing layer
 
2. Ground formation, good electromagnetic wave absorption capacity
 
3. Signal 2 stripline routing layer, good routing layer
 
4. Power supply layer, and the formation below constitute excellent electromagnetic absorption
 
5. Ground formation
 
6. Signal 3 stripline routing layer, good routing layer
 
7. Ground formation, good electromagnetic wave absorption capacity
 
8. Signal 4 microstrip line layer, good routing layer

How to choose how many layers to use in PCB design and how to stack them depends on many factors, such as the number of signal networks on the PCB board, device density, pin density, signal frequency, board size and so on. We should consider these factors comprehensively. The more the number of signal networks, the higher the device density, the greater the pin density, and the higher the signal frequency, the multi-layer PCB design should be used as far as possible. In order to get good EMI performance, it is better to ensure that each signal layer has its own reference layer.

Related Articles
  • TEL:+86-755-33583558 Ext 603
  • EMAIL:[email protected]
  • ADDRESS:407, Kanglan Fortune Center, Fuzhou Avenue, Fuyong Street, Baoan District, Shenzhen, Guangdong 518103, China