🌡️ Thermal Pad & Via Array Calculator

Optimize thermal via count and arrangement for power components (QFN, MOSFET, LED)

Based on empirical data for 1-2 oz copper | IPC-2152 inspired
Pad length (mm/mil)
Pad width
Heat generated by the component
Target ΔT above ambient (e.g., 20°C)
Finished hole diameter
Leave empty for default (via dia + 0.8mm)
Filled vias reduce thermal resistance by ~30%
📖 Methodology: Thermal via power rating is derived from empirical data (0.7W per 0.3mm via at 1oz Cu, 20°C rise). Scaling factors for diameter, copper thickness, and ΔT are applied. Maximum via count is limited by pad dimensions and minimum manufacturing clearance (0.8mm pitch default).
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